Current AMD processors have two external busses. One is used on the communication between the CPU and the memory, and it is simply called “memory bus.” The other is used on the communication between the CPU and all other PC components through the motherboard chipset and is called HyperTransport – an I/O (Input/Output) bus. In this tutorial, we will be explaining how the HyperTransport bus works and clarifying common mistakes people assume about this bus.

This bus was added starting with the AMD64 architecture, and in older AMD processors not based on this architecture (such as the original Athlon, Athlon XP, and Sempron socket 462 processors), the CPU has only one external bus, also known as the front side bus (FSB). In this approach, the external bus carries both memory and I/O communications. Since there is only one datapath out of the processor, memory and I/O transfers compete with each other for the use of the bus, thus lowering the I/O performance.

In Figure 1, you can see how an AMD processor communicates with the external world. The “bridge” chip is the motherboard chipset. Depending on the chipset, you can have one or two chips. On two-chip solutions, all peripherals (such as hard disk drives, add-on cards, sound cards, etc.) are connected to the second chip. (This second chip is called south bridge, not shown in Figure 1.) On single-chip solutions, everything is connected to this single chip.

HyperTransport BusFigure 1: Location of the HyperTransport bus on AMD processors

AMD CPUs targeted to servers – i.e., Opteron processors – can have one, two or three HyperTransport busses, depending on the model. These extra busses are used to interconnect several CPUs allowing them to talk to each other, i.e., used on servers with more than one CPU on the motherboard. Since desktop and notebook CPUs do not support this kind of configuration, there is only one HyperTransport bus on them.

For a more in-depth explanation of AMD64 architecture, please read our “Inside AMD64 Architecture” tutorial.

Besides providing AMD processors with separated datapaths for memory and I/O, HyperTransport brings another advantage: it provides separated links for the CPU input and output operations, allowing the CPU to transmit (“write”) and receive (“read”) I/O data at the same time (i.e., in parallel). In the traditional architecture using a single external bus, since the external bus is used for both input and output operations, reads and writes cannot be done simultaneously.

HyperTransport BusFigure 2: The HyperTransport bus provides separate input and output datapaths

Gabriel Torres is a Brazilian best-selling ICT expert, with 24 books published. He started his online career in 1996, when he launched Clube do Hardware, which is one of the oldest and largest websites about technology in Brazil. He created Hardware Secrets in 1999 to expand his knowledge outside his home country.