Everything You Need to Know About Chipsets
By Gabriel Torres on August 2, 2012
What is a chipset? What are its functions? What is its importance? What is its influence in the computer’s performance? In this tutorial we will answer all of these questions and more.
“Chipset” is the name given to the set of chips (hence its name) used on a motherboard.
In the first PCs, the motherboard used discrete integrated circuits. Therefore, many chips were needed to create all the necessary circuitry to make the computer work. In Figure 1, you can see a motherboard from a PC XT clone.
After some time, chip manufacturers started to integrate several chips into larger chips. Instead of requiring dozens of small chips, a motherboard could now be built using only a half-dozen big chips.
Around the mid-1990s, motherboards using only two or even one big chip could be built. In Figure 2, you can see a motherboard for 486-class CPUs circa 1995 using only two big chips with all necessary functions to make the motherboard work.
With the release of the PCI bus, a new concept, which is still used nowadays, could be used for the first time: the use of bridges. Usually, motherboards have two big chips: the north bridge and the south bridge. Sometimes, some chip manufacturers can integrate the north and south bridges into a single chip; in this case, the motherboard will have just one big integrated circuit. Or, depending on the CPU architecture, it may require only the south bridge chip.
In the past, several different companies provided chipsets for the PC. Nowadays, however, only Intel, AMD, and VIA are still manufacturing chipsets, and they only design products for motherboards that will use their CPUs. (VIA also used to design chipsets for CPUs from both Intel and AMD.) Other companies that used to manufacture chipsets include ATI, NVIDIA, VIA, SiS, ULi/ALi, UMC, and OPTi.
A common confusion is to mix the chipset manufacturer with the motherboard manufacturer. For example, because a motherboard uses a chipset manufactured by Intel does not mean that Intel manufactured this board. ASUS, Gigabyte, MSI, ECS, ASRock, Biostar, and also Intel are just some of the many motherboard manufacturers present on the market. So, the motherboard manufacturer buys the chipsets from the chipset manufacturer and builds motherboards. Here you can see a complete list of motherboard manufacturers.
The north bridge chip, also called MCH (Memory Controller Hub), is connect directly to the CPU and has basically the following functions:
Current Intel CPUs have an integrated memory controller and an integrated PCI Express controller, meaning that these CPUs have an integrated north bridge chip; therefore, they don’t require this chip on the motherboard. See Figure 3. CPUs from AMD have an integrated memory controller but don’t have an integrated PCI Express controller. Because of that, CPUs from AMD still require an external north bridge chip with this component. AMD says its processors have an “integrated north bridge,” but what the company really means is that the CPUs have an integrated memory controller. This creates much confusion. Several users don’t understand why motherboards for AMD processors have a north bridge chip if the CPU manufacturer says the CPU has an integrated north bridge chip.
With older CPUs that don’t have an integrated memory controller, the system will follow the diagram presented in Figure 5. With older CPUs, since the memory controller is located inside the external north bridge chip, this chip plays an important role in the computer’s performance. One chipset may have a better memory controller and present higher performance. Nowadays, however, since the memory controller is embedded in the CPU, there is almost no performance difference between different chipsets.
The PCI Express controller embedded in the north bridge chip or in the CPU may provide several lanes. The most common configuration is for it to provide 16 lanes, allowing the motherboard to have one PCI Express x16 slot or two PCI Express x16 slots, each working at x8. Additional PCI Express lanes required to connect the other slots and devices available on the motherboard are provided by the south bridge chip. High-end PCI Express controllers usually provide more than 16 lanes, allowing the motherboard manufacturer to either provide more PCI Express x16 slots for video cards or allow the connection of other slots and devices directly to the north bridge chip or CPU.
The connection between the north bridge and the south bridge is accomplished through a bus. Initially, the PCI bus was used, but later it was replaced by a dedicated bus. We will explain more about this later.
The south bridge chip, also called ICH (I/O Controller Hub) or PCH (Platform Controller Hub) is connected to the north bridge (or the CPU, in the case of current Intel CPUs) and is in charge of controlling I/O devices and on-board devices, such as:
(*) If the south bridge has a built-in audio controller, it will need an external chip called a codec (short for coder/decoder) to operate. Read our “How On-Board Audio Works” tutorial for more information. Some high-end motherboards use an external audio controller, which is connected to the south bridge chip through a PCI Express x1 lane.
(**) If the south bridge has a built-in network controller, it will need an external chip called a “PHY” (short for “physical”) to operate. Most motherboards use an external network controller connected to the south bridge chip through a PCI Express x1 lane.
Other integrated devices the motherboard may have, such as additional USB, SATA, and network controllers, will be connected to the south bridge chip through individual PCI Express x1 lanes. (On some motherboards these devices may be connected to the north bridge chip instead, if the PCI Express controller embedded in the north bridge chip has plenty of PCI Express lanes.)
The south bridge is also connected to two other chips available on the motherboard: the ROM chip, also known as the BIOS chip (BIOS is one of the programs written inside this chip), and the Super I/O chip, which is in charge of controlling legacy devices such as serial ports, parallel ports, floppy disk drives, and PS/2 ports for keyboard and mouse.
In Figure 6, you can see a diagram explaining the role of the south bridge in the computer.
When the bridge concept started being used, the communication between the north bridge and the south bridge was done through the PCI bus, as shown in Figure 7. The problem with this approach is that the bandwidth available for the PCI bus (132 MB/s) will be shared between all PCI devices in the system and all devices hooked to the south bridge, especially hard disk drives.
When high-end video cards (at that time, video cards were PCI) and high-performance hard disk drives were launched, a bottleneck situation arose. For high-end video cards, the solution was the creation of a new bus connected directly to the north bridge, called AGP (Accelerated Graphics Port). This way the video card was not connected to the PCI bus and performance was not compromised.
The final solution came when the chipset manufacturers started utilizing a new approach: using a dedicated high-speed connection between north and south bridges and connecting the PCI devices to the south bridge. This is the architecture that is used today. Standard PCI slots, if available, are connected to the south bridge. PCI Express lanes can be available on both the north bridge chip and the south bridge chip. Usually, PCI Express lanes available on the north bridge chip are used for video cards, while the lanes available on the south bridge chip are used to connect slower slots and on-board devices, such as additional USB, SATA, and network controllers.
The configuration of this dedicated connection depends on the chipset model. The first Intel chipsets to use this architecture had a dedicated 266 MB/s channel. This channel was half-duplex, meaning that the north bridge and the south bridge couldn’t “talk” at the same time. Either one chip or the other was transmitting.
Currently, Intel uses a dedicated connection called DMI (Direct Media Interface), which uses a concept similar to PCI Express, with lanes using serial communications, and separate channels for data transmission and reception (i.e., full-duplex communication). The first version of DMI uses four lanes and is able to achieve a data transfer rate of 1 GB/s per direction (2.5 Gbps per lane), while the second version of DMI doubles this number to 2 GB/s. Some mobile chipsets use two lanes instead of four, halving the available bandwidth.
AMD uses a dedicated datapath called “A-Link,” which is a PCI Express connection with a different name. “A-Link” and “A-Link II” use four PCI Express 1.1 lanes and, therefore, achieve a 1 GB/s bandwidth. The “A-Link III” connection uses four PCI Express 2.0 lanes, achieving a 2 GB/s bandwidth.
If you want to know the details of a given chipset, just go to the chipset manufacturer website. Here you can find a complete list of chipset manufacturers and their websites.