Everything You Need to Know About Chipsets
By
Gabriel Torres
on September 7, 2005
After all, what is a chipset? What are its functions? What is its importance? What is its influence in the computer performance? In this tutorial we will answer all these questions and more.
Chipset is the name given to the set of chips (hence its name) used on a motherboard.
On the first PCs, the motherboard used discrete integrated circuits. So a lot of chips were needed to create all the necessary circuitry to make the computer work. On Figure 1 you can see a motherboard from a PC XT.
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Figure 1: PC XT motherboard.
After some time the chip manufacturers started to integrate several chips into larger chips. So, instead of requiring dozens of small chips, a motherboard could now be built using only a half-dozen big chips.
The integration continued and around the mid-1990’s motherboards using only two or even one big chip could be built. On Figure 2 you can see a 486 motherboard circa 1995 using only two big chips with all necessary functions to make the motherboard work.
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Figure 2: A 486 motherboard, this model uses only two big chips.
With the release of the PCI bus, a new concept, which is still used nowadays, could be used for the first time: the use of bridges. Usually motherboards have two big chips: north bridge and south bridge. Sometimes some chip manufacturers can integrate the north and south bridges into a single chip; in this case the motherboard will have just one big integrated circuit!
With the use of bridges chipsets could be better standardized, and we will explain the role of these chips on the next pages.
Chipsets can be manufactured by several companies, like ULi (new name for ALi), Intel, VIA, SiS, ATI and nVidia. In the past other players were at the market, like UMC and OPTi.
A common confusion is to mix the chipset manufacturer with the motherboard manufacturer. For example, only because a motherboard uses a chipset manufactured by Intel, this not means that Intel manufactured this board. ASUS, ECS, Gigabyte, MSI, DFI, Chaintech, PCChips, Shuttle and also Intel are just some of the many motherboard manufacturers present in the market. So, the motherboard manufacturer buys the chipsets from the chipsets manufacturer and builds them. Actually there is a very interesting aspect of this relationship. To build a motherboard, the manufacturer can follow the chipset manufacturer standard project, also known as “reference design”, or can create its own project, modifying some things here and there in order to provide better performance or more features.
Here you can see a complete list of motherboard manufacturers.
The north bridge chip, also called MCH (Memory Controller Hub) is connect directly to the CPU and has basically the following functions:
(*) Except for socket 754, socket 939 and socket 940 CPUs (CPUs from AMD like Athlon 64), because on these CPUs the memory controller is located in the CPU itself, not in the north bridge.
Some north bridge chips also controls PCI Express x1 lanes. On other PCI Express chipsets it is the south bridge that controls the PCI Express x1 lanes. In our explanations we will assume that the south bridge is the component in charge of controlling the PCI Express x1 lanes, but keep in mind that this can vary according to the chipset model.
On Figure 3 you can see a diagram explaining the role of the north bridge in the computer.
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Figure 3: North bridge.
As you can see, the CPU does not directly accesses the RAM memory or the video card, it is the north bridge that accesses these devices. Because of that, the north bridge chip has an ultimate role in the computer performance. If a north bridge chip has a better memory controller than another north bridge, the performance of the whole computer will be better. That’s one explanation why you can have two motherboards targeted to the same class of processors achieving different performances.
As we mentioned, on Athlon 64 CPUs the memory controller is embedded in the CPU and that’s why there is almost no performance difference among motherboards for this platform.
Since the memory controller is in the north bridge, is this chip that limits the types and maximum amount of memory you can have in our system (on Athlon 64 it is the CPU that sets these limits).
The connection between the north bridge and the south bridge is done through a bus. At first the PCI bus was used, but later it was replaced by a dedicated bus. We will explain more about this later, since the kind of bus used on this connection can affect the computer performance.
The south bridge chip, also called ICH (I/O Controller Hub) is connected to the north bridge and is in charge basically of controlling I/O devices and on-board devices, like:
(*) If the south bridge has a built-in audio controller, it will need an external chip called codec (short for coder/decoder) to operate.
(**) If the south bridge has a built-in network controller, it will need an external chip called phy (short for physical) to operate.
The south bridge is also connected to two other chips available on the motherboard: the ROM chip, more known as BIOS, and the Super I/O chip, which is in charge of controlling legacy devices like serial ports, parallel port and floppy disk drive.
On Figure 4 you can see a diagram explaining the role of the south bridge in the computer.
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Figure 4: South bridge.
As you can see, while south bridge can have some influence on hard disk drive performance, this component is not so critic to performance as the north bridge. Actually, south bridge has more to do with the features your motherboard will have than with performance. It is the south bridge that sets the number (and speed) of USB ports and the number and types (regular ATA or Serial ATA) of hard disk drive ports that your motherboard has, for example.
When the bridge concept started to be used, the communication between the north bridge and the south bridge was done thru this bus, as we show on Figure 5. The problem of this approach is that the bandwidth available for the PCI bus – 132 MB/s – will be shared between all PCI devices in the system and devices hooked to the south bridge – especially hard disk drives. At that time, this wasn’t a problem, since hard drives maximum transfer rates were of 8 MB/s and 16 MB/s.
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Figure 5: Communication between north and south bridges using the PCI bus.
But when high-end video cards (at that time, the video cards were PCI) and high-performance hard disk drives were launched, a bottleneck situation arouse. Just think of modern ATA/133 hard disk drives, which have the same theoretical maximum transfer rate as the PCI bus! So, in theory, an ATA/133 hard drive would “kill” and the entire bandwidth, slowing down the communication speed of all devices connected to the PCI bus.
For the high-end video cards, the solution was the creation of a new bus connected directly to the north bridge, called AGP (Accelerated Graphics Port).
The final solution came when the chipset manufacturers started using a new approach: using a dedicated high-speed bus between north and south bridges and connecting the PCI bus devices to the south bridge.
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Figure 6: Communication between north and south bridges using a dedicated bus.
When Intel started using this architecture it started calling the bridges as “hubs”, the north bridge became MCH (Memory Controller Hub) and the south bridge became ICH (I/O Controller Hub). It is just a matter of nomenclature in order to clarify the architecture that is being used.
Using this new architecture, which is the architecture that motherboards use nowadays, when the CPU reads data from a hard drive, the data is transferred from the hard drive to the south bridge, then to the north bridge (using the dedicated bus) and then to the CPU (or directly to memory, if the Bus Mastering – a.k.a. DMA – method is being used). As you can see, the PCI bus is not used at all on this transfer, what didn’t happen on the previous architecture, since the PCI bus was in the middle of the road.
The speed of this dedicated bus depends on the chipset model. For example, on Intel 925X chipset this bus has a maximum transfer speed of 2 GB/s. Also, the manufacturers call this bus with different names:
(*) DMI interface is newer, used on i915 and i925 chipsets on and uses two separated data paths, one for data transmission and another for reception (full-duplex communication). Intel Hub Architecture, used by previous chipsets, uses the same data path for both transmission and reception (half-duplex communication).
(**) Some nVidia and SiS chipsets use only one chip, i.e. i.e. the functionalities of both north and south bridges are integrated into a single chip.
Also, on Radeon Xpress 200 from ATI, the communication between north and south bridges uses two PCI Express lanes. This doesn’t affect the performance of the system, because contrary to PCI, PCI Express bus is not shared between all PCI Express devices. It is a point-to-point solution, which means that the bus only connect two devices, the receiver and the transmitter; no other device can be attached to this connection. One lane is used for data transmission and the other for data reception (full-duplex communication).
HyperTransport bus also uses separated data paths, one for data transmission and another for reception (full-duplex communication). Click here to learn more about this bus.
If you want to know the details of a given chipset, just go to the chipset manufacturer website. Here you can find a complete list of chipset manufacturers and their websites.
As a last comment, you may be wondering what is “on-board PCI devices” listed on Figures 5 and 6. On-board devices like LAN and audio can be controlled by the chipset (south bridge) or by an extra controller chip. When this second approach is used, this controller chip is connected to the PCI bus.
Originally at http://www.hardwaresecrets.com/article/191