Enhanced SpeedStep Technology
SpeedStep Technology was created to increase battery life and was first introduced with Pentium III M processor. This first version of SpeedStep Technology allowed the CPU to switch between two clock frequencies on the fly: Low Frequency Mode (LFM), which maximized battery life, and High Frequency Mode (HFM), which allowed you to run your CPU at its maximum speed. The CPU had two clock multiplier ratios and what it did was to change the ratio it was using. The LFM ratio was factory-lock and you couldn’t change it.
Pentium M introduced Enhanced SpeedStep Technology, which goes beyond that, by having several other clock and voltage configurations between LFM (which is fixed at 600 MHz) and HFM (which is the CPU full clock).
Just to give you a real example, the clock/voltage configuration table for a 1.6 GHz Pentium M based on 130 nm technology is the following:
|1.484 V||1.6 GHz|
|1.42 V||1.4 GHz|
|1.276 V||1.2 GHz|
|1.164 V||1 GHz|
|1.036 V||800 MHz|
|0.956 V||600 MHz|
Each Pentium M model has its own voltage/clock table. It is very interesting to notice that it is not only about lowering the clock rate when you don’t need so much processing power from your laptop, but also about lowering its voltage, which helps a lot to lower battery consumption.
Enhanced SpeedStep Technology works by monitoring specific MSRs (Model Specific Registers) from the CPU called Performance Counters. With this information, the CPU can lower or raise its clock/voltage depending on CPU usage. Simply put, if you increase CPU usage, it will increase its voltage/clock, if you lower the CPU usage, it will lower its voltage/clock.
Enhanced SpeedStep was just one of the several enhancements done on Pentium M microarchitecture in order to increase battery life.
A good example was done on the execution units. On other processors, the same power line feeds all execution units. So it is not possible to turn off an idle execution unit on Pentium 4, for example. On Pentium M execution units have different power lines, making the CPU capable of turning off idle execution units. For example, Pentium M detects in advance if a given instruction is an integer one (“regular instruction”), disabling the units and datapaths not needed to process that instruction, if they are idle, of course.
- 1. Introduction
- 2. Pentium M Pipeline
- 3. Memory Cache and Fetch Unit
- 4. Instruction Decoder and Register Renaming
- 5. Reorder Buffer
- 6. Reservation Station and Execution Units
- 7. Enhanced SpeedStep Technology