Atom is based on a entire new microarchitecture, having the same instruction-set of CPUs based on Core microarchitecture, like Core 2 Duo. The main difference of the microarchitecture used on Atom is that it processes instructions in order, which is the way CPUs up to the first Pentium used to work. CPUs starting with Pentium Pro and Pentium II use an out-of-order engine. This change was made in order to save energy, since the components in charge of issuing and controlling microinstructions execution could be removed. Atom can decode two instructions per clock cycle.
Pipeline is a list of stages that each instruction must go through in order to be fully executed. For more explanation, read our tutorial called How a CPU Works.
Atom has a 16-stage pipeline, which is a little bit longer than current Core 2 CPUs. This was done for some reasons. First, this allows a better power efficiency. More stages means more units, which can be spread across the chip and thus better spreading heat production, instead of having fewer units which would concentrate heat on a single point. With more units the probability of having some of them idle is higher compared to a CPU with fewer units, meaning that they can be turned off for power savings. Another advantage in a longer pipeline is that the microarchitecture can achieve higher clock rates. The reason why is that each unit will have fewer transistors, making it easier to pump clock rate.
Another feature found on Atom is a true 128-bit internal datapath, feature introduced with processors based on Core microarchitecture (e.g., Core 2 Duo). On previous CPUs the internal datapath was of 64 bits only. This was a problem for SSE instructions, since SSE registers, called XMM, are 128-bit long. So, when executing an instruction that manipulated a 128-bit data, this operation had to be broke down into two 64-bit operations. The 128-bit internal datapath makes Atom faster to process SSE instructions that manipulate 128-bit data. Intel calls this feature “Digital Media Boost.”
As mentioned, Atom CPUs have a 32 KB L1 instruction cache, a 24 KB L1 data cache and a 512 KB L2 cache. They don’t have an integrated memory controller, memory types and maximum sizes are defined by the memory controller inside the chipset, not by the CPU.
Atom also features Hyper-Threading technology, which is the ability of using unused CPU units to form a second virtual CPU, making the operating system to see each CPU core as having two CPUs (two threads, on the industry’s jargon) even though only one core is physically present. Of course this technique is less efficient than having two real CPU cores, but this extra core – and thus extra performance – you are gaining for free.
- 1. Introduction
- 2. Microarchitecture
- 3. Power-Saving Modes
- 4. Chipset
- 5. The Future: Moorestown Platform