Besides adding new clock rates – and thus new transfer rates – the HyperTransport 3.0 brings several new features over HyperTransport 2.0, such as AC operating mode, Link Splitting (a.k.a. Un-Ganging), Hot Plugging, and Dynamic Link Clock/Width Adjustment. Current AMD processors, such as the Phenom, Phenom II, Athlon II, and FX, use the latest version of the HyperTransport bus.
HyperTransport 3.0 adds the following new clock rates, keeping compatibility with HT1 and HT2 rates (transfer rates assuming 16-bit links, which is the configuration used by AMD processors):
- 1,800 MHz = 3,600 MT/s = 7,200 MB/s
- 2,000 MHz = 4,000 MT/s = 8,000 MB/s
- 2,400 MHz = 4,800 MT/s = 9,600 MB/s
- 2,600 MHz = 5,200 MT/s = 10,400 MB/s
Sometimes you will see the MT/s numbers published as MHz, as already discussed.
Socket AM2+ and AM3 processors and their companion chipsets, however, are limited to the 8,000 MB/s transfer rate. Only socket AM3+ CPUs and chipsets are capable of using all the speeds published above. Of course, all CPUs and chipsets are compatible with the lower transfer rates available.
Keep in mind that socket AM2+ processors can still be installed on socket AM2 motherboards, however, their HyperTransport bus will be limited to HT2 speeds.
Once again, the transfer rates announced by the HyperTransport consortium are highly exaggerated. They announce HyperTransport 3.0 as having a maximum transfer rate of 41.6 GB/s. To reach this number they considered 32-bit links (and not 16-bit links) and doubled the number found by two because there are two links available. The math used was 2,600 MHz x 32 x 2 / 8 x 2 links. As we have already explained, AMD processors use 16-bit links, not 32-bit ones, and we don’t agree with the methodology of doubling the transfer rate, done because there is one link for transmitting and another for receiving data. We would only agree with this if the links were in the same direction.
Now let’s talk about the extra features brought by HyperTransport 3.0.
The new AC operating mode (translation: using a signaling system similar to networks) allows the HyperTransport bus to achieve longer distances. The goal is to allow the HyperTransport to be used directly to interconnect cases, boards, and backplanes. Processors won’t use this feature.
Link splitting, also called un-ganging, allows the 16-bit link to be accessed as two independent eight-bit links. This can be used for increasing the number of links available, thereby allowing more CPUs to be interconnected without using any extra fancy hardware.
Hot Plugging allows HyperTransport devices to be installed and removed with the bus running. It won’t allow you to replace your CPU with the system turned on because the CPU has several other pins besides the HyperTransport, but this feature may be used on storage servers based on HT3.
Finally, the Dynamic Link Clock/Width Adjustment is used by HT3-based AMD CPUs when installed on a motherboard using an HT3 chipset. This feature allows the CPU to change the clock and the number of bits that are transmitted per clock cycle dynamically, i.e., “on the fly.” The idea here is to reduce power consumption. For example, if the CPU senses that running its HyperTransport bus at 2,600 MHz (10,400 MB/s) is too much for what it is doing at the moment, it can reduce the bus to 1,000 MHz (4,000 MB/s) or whatever rate it thinks will be more suitable. The same is true for the number of bits transferred per clock cycle; it can be reduced from 16 to whatever number the CPU feels like, based on the current system usage.