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Inside Intel Nehalem Microarchitecture
Author: Gabriel Torres 107,375 views
Type: Tutorials Last Updated: August 26, 2008
Page: 3 of 7
Memory Cache

On the cache memory side Intel will use the same cache arrangement AMD is using on their Phenom CPUs, i.e., individual L2 caches for each core and a shared L3 memory cache. Each L2 memory cache will be of 256 KB and the L3 cache will be of 8 MB, at the least for the first models to be launched (Intel may launch Nehalem-based Xeon CPUs with more cache). L1 cache remains the same as Core 2 Duo (64 KB, 32 KB for instructions and 32 KB for data).

Core 2 Duo processors have only one L2 memory cache, which is shared among all CPU cores, but quad-core CPUs from Intel like Core 2 Quad and Core 2 Extreme have two L2 caches, each one shared by each group of two cores. For a better understanding we summarize the available cache architectures on Figures 3 and 4.

Cache Architecture
click to enlarge
Figure 3: A comparison between cache architectures.

Cache Architecture
click to enlarge
Figure 4: A comparison between cache architectures.

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