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Home » CPU
IDF Spring 2006 Coverage
Author: Gabriel Torres 30,812 views
Type: Articles Last Updated: March 7, 2006
Page: 2 of 3
Core Microarchitecture

Core microarchitecture is based on Pentium M’s, which in turn is based on Pentium III’s. For a better understanding on this subject, we recommend you to read our tutorial Inside Pentium M Architecture.

Intel Core Microarchitecture
click to enlarge
Figure 4: Intel Core microarchitecture.

This new architecture introduces the following new features over Pentium M’s:

  • 14-stage pipeline (Intel has never turned public Pentium M’s pipeline; Pentium III used a 11-stage one).
  • Micro-fusion: concept introduced on Pentium M, where the instruction decoder fuses two micro-ops into one micro-op in order to save energy and improve performance.
  • Macro-fusion: new feature, the CPU fuses two macro-ops (x86 instructions) into just one instruction to be sent to the instruction decoder. The idea is to save energy and improve performance.
  • Single-cycle 128-bit SSE.
  • Shared L2 memory cache: instead of each CPU core having an individual memory cache, the CPU cache is shared between the cores. This helps preventing that the CPU runs out of cache, situation where it has to the slow RAM memory to grab more instructions and data.
  • Advanced pre-fetch.
  • Memory disambiguation.
  • Advanced power gating.

Due to the keynote dynamics Rattner wasn’t able to explain in depth details about each one of these features. However we are scheduled to attend to a class specifically about the new Core microarchitecture, and as soon as we have this information we will publish a tutorial explaining in details this new microarchitecture.

Rattner also gave an idea how CPUs based on this new microarchitecture will perform compared to CPUs from current-generation CPUs. Merom will be 20% faster than a comparable Core Duo T2600 and keeping the same power consumption; Conroe will be 40% faster and consume 40% less energy than a comparable Pentium D (950 model); and Woodcrest will be 80% faster and consume 35% less energy than a comparable Xeon (2.8 GHz, dual-core, 2 MB L2 cache). Nowadays on a Xeon-based server the CPU represents almost 50% of the system consumption. With Woodcrest, the CPU consumption represents only 33%, and thus the other parts of the server should be optimized to consume less power in the near future.

By the way, Conroe’s TDP (Thermal Power Design) will be of 65 W.

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