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All Pentium M Models

Author: Cássio Lima
Type: Tutorials	Last Updated: August 16, 2007
Page: 2 of 3

Banias

The first Pentium M models were based on a core called Banias, which had a 32 KB L1 instruction cache, a 32 KB L1 data cache, a 1 MB L2 cache, worked externally at 400 MHz (100 MHz transferring four data per clock cycle), had SSE2 instructions support, Enhanced SpeedStep technology on models SL6NA and SL6P4 (which reduces the CPU clock in order to save battery life when the computer is idle), 130 nm manufacturing process, socket 478 or 479 pinout and 77 million transistors on a area of 3.26 squared inches (82.79 mm2), using copper on its metal layers.

click to enlarge
Figure 1: Banias core.

In the table below we list all Pentium M models released based on the Banias core. TDP means Thermal Design Power and indicates the thermal dissipation of the CPU.

sSpec	Model Number	Internal Clock	External Clock	TDP	Max. Temp. (º C)	L2 Cache	Socket	Voltage	Execute Disable
SL6N9	-	1.70 GHz	400 MHz	24.5 W	100	1 MB	479	1.484 V	No
SL6N5	-	1.70 GHz	400 MHz	24.5 W	100	1 MB	478	1.484 V	No
SL6FA	-	1.60 GHz	400 MHz	24.5 W	100	1 MB	479	1.484 V	No
SL6F7	-	1.60 GHz	400 MHz	24.5 W	100	1 MB	478	1.484 V	No
SL6F6	705	1.50 GHz	400 MHz	24.5 W	100	1 MB	478	1.484 V	No
SL6F9	705	1.50 GHz	400 MHz	24.5 W	100	1 MB	479	1.484 V	No
SL6F8	-	1.40 GHz	400 MHz	22 W	100	1 MB	478	1.484 V	No
SL6F5	-	1.40 GHz	400 MHz	22 W	100	1 MB	479	1.484 V	No
SL6NA	-	1.30 GHz	400 MHz	22 W	100	1 MB	479	1.25 V -1.4 V	No
SL6N8	718	1.30 GHz	400 MHz	12 W	100	1 MB	478	1.180 V	No
SL6N4	718	1.30 GHz	400 MHz	12 W	100	1 MB	479	1.180 V	No
SL6NB	-	1.20 GHz	400 MHz	12 W	100	1 MB	479	1.180 V	No
SL6P4	713	1.10 GHz	400 MHz	12 W	100	1 MB	479	1.180 V	No
SL6NC	-	1.10 GHz	400 MHz	12 W	100	1 MB	479	1.180 V	No
SL6NJ	-	900 MHz	400 MHz	7 W	100	1 MB	479	1.004 V	No

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