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AGP System Architecture (2nd Edition)
AGP System Architecture (2nd Edition), by Tom Shanley (Addison-Wesley Professional), starting at $0.01
Home » Motherboard » Bus
AGP Bus Tutorial
Author: Cássio Lima 153,575 views
Type: Tutorials Last Updated: June 23, 2005
Page: 1 of 3

Until the release of the AGP bus, video cards were installed in the PCI bus. The maximum theoretical transfer rate of the 32-bit PCI bus at 33 MHz was 133 MB/s, an insufficient rate for 3D applications (such as games, for instance) and that limited the development of more sophisticated video cards. Besides of its low transfer rate, the PCI bus had another problem: it was ”choked“. The chipsets architecture used at that time was that of bridges, which used the PCI bus for the communication of the north bridge circuit with the south bridge one. Besides, most on-board peripherals of the PC were installed in the PCI bus, such as the on-board IDE ports, the SCSI controller, the on-board video, sound and network cards. No to mention the peripherals that could be installed in the PCI bus via PCI slots.

click to enlarge
Figure 1: Simplified diagram of the PCI bus.

It happens that the maximum transfer rate of the PCI bus – 133 MB/s – is shared by devices connected to the bus, and not used by each peripheral during its transfer. In other words, the transfer rate used by a PCI video card is not 133 MB/s, but lower, for the more peripherals plugged to the PCI bus, the lower will the real transfer rate obtained by them be.

Motivated by those reasons, Intel launched the AGP bus. The main aim of the AGP bus was to increase the transfer rate of the video cards – having them installed in the faster AGP bus and no longer in the PCI bus. Technically speaking, AGP is not a bus, for only one device is connected to it: the video card. It is more a high performance point-to-point connection used only by video cards.

Intel launched the first version of the AGP (Accelerated Graphics Port or Accelerated Graph Port) bus in July, 1996. That bus worked with a clock of 66 MHz transferring 32 bits at a time, it was fed with 3.3V and operated in two modes: 1x and 2x. The first chipset to support such bus was the Intel 440LX, marketed in August, 1997.

In May, 1998, Intel launched the second version of the AGP bus that allowed the operation mode at 4x and was fed with 1.5V. The first chipset to support the second version of the ACP bus was the Intel 815P, marketed in June, 2000.

The most recent version of the AGP bus is the third one, developed in November, 2000. Actually it is an enhancement of the second version, allowing the operation mode at 8x. The first chipset to support the third version of the ACP bus was the Intel 865P, marketed in May, 2003.


Operation Modes


AGP 1.0

1x and 2x


AGP 2.0

1x, 2x and 4x


AGP 3.0

1x, 2x, 4x and 8x


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