| Inside Intel Core Microarchitecture |
|
|
$ Check REAL-TIME pricing for Amazon.com Intel BX80557E1500 Celeron Dual Core E1500 Processor Electronics $ |
|
|
|
|
|
| Introduction |
The new Intel Core microarchitecture, which was unveiled during IDF Spring 2006, will be used on all new CPUs from Intel, like Merom, Conroe and Woodcrest. It is based on Pentium M’s microarchitecture, bringing some new features. In this tutorial we will give you an in-depth trip into this new microarchitecture from Intel.
The first thing to have in mind is that, besides the name, Core microarchitecture has nothing to do with Intel’s Core Solo and Core Duo CPUs. Core Single is a Pentium M manufactured under 65 nm technology, while Core Duo – formerly known as Yonah – is a dual-core 65 nm CPU based on Pentium M’s microarchitecture. Pentium M is based on Intel’s 6th generation architecture, a.k.a. P6, the same used by Pentium Pro, Pentium II, Pentium III and early Celeron CPUs and not on Pentium 4’s as you may think, being originally targeted to mobile computers. You may think of Pentium M as an enhanced Pentium III. Thus you may think of Core microarchitecture as an enhanced Pentium M.
In order to continue reading this tutorial, however, you need to have read two other tutorials we have already posted: “How a CPU Works” and “Inside Pentium M Architecture”. In the first one we explain the basics about how a CPU works, and on the second one, how Pentium M works. In the present tutorial we are assuming that you have already read them both, so if you didn’t, please take a moment to read it before continuing, otherwise you may find yourself a little bit lost here. It is also a good idea to read our Inside Pentium 4 Architecture tutorial, just for understanding how Core microarchitecture differs from Pentium 4’s.
Core microarchitecture uses a 14-stage pipeline. Pipeline is a list of all stages a given instruction must go thru in order to be fully executed. Intel didn’t disclosure Pentium M’s pipeline and so far they didn’t publish the description of each stage of Core microarchitecture pipeline as well, so we are unable to provide more in depth information on that. Pentium III used an 11-stage pipeline, the original Pentium 4 had a 20-stage pipeline and newer Pentium 4 CPUs based on “Prescott” core have a 31-stage one!
Of course whenever Intel publishes more details on Core microarchitecture we will update this tutorial.
Let’s now talk what is different on Core microarchitecture from Pentium M’s. |
| Pages (7): [1] 2 3 4 5 6 7 » |
| Print Version | Send to Friend |
|
Bookmark Article
| Comments (0)
|
|
Recommended Deal |
 | Amazon.com Corsair CMPSU-450VX 450-Watt VX Series 80 Plus Certified Power Supply compatible with Core i7 and i5 Electronics value select
|
|
Latest News |
November 20, 2009 - 12:37 PM PST |
November 19, 2009 - 7:30 AM PST |
November 18, 2009 - 11:30 AM PST |
November 18, 2009 - 10:18 AM PST |
November 17, 2009 - 1:39 PM PST |
November 17, 2009 - 1:06 PM PST |
November 17, 2009 - 10:18 AM PST |
November 16, 2009 - 11:46 AM PST |
November 13, 2009 - 12:51 PM PST |
November 11, 2009 - 3:31 PM PST |
| .:: More News ::. |
|
Latest Content |
|
|
| Our Most Popular Articles |
1,077,989 views
|
705,682 views
|
678,757 views
|
593,038 views
|
562,154 views
|
559,786 views
|
487,838 views
|
476,989 views
|
394,221 views
|
338,412 views
|
|
| Latest Threads in Our Forums |
by Hardware Secrets Team |
by pistonpete |
by Hardware Secrets Team |
by Trevorrross |
by need2know |
by Olle P |
by Sherry |
by Hardware Secrets Team |
by 6dracing |
by tomahawk 1705 |
| .:: Visit Our Forums ::. |
|
|