|All Athlon 64 Models|
In this tutorial we will list all Athlon 64, Athlon 64 FX, Athlon 64 X2, Athlon II X2, Athlon II X3 and Athlon II X4 CPU models from AMD released to date and the main differences between them.
By the way, AMD has recently changed the name of those CPUs, dropping the number "64" from their name. So Athlon X2 and Athlon 64 X2 are the same CPU, and so on.
All those CPUs are based on AMD64 architecture, where the main feature is the memory controller embedded in the processor itself and not located on the chipset like all other CPUs. Besides Athlon 64, Athlon 64 FX and Athlon 64 X2 we also have Sempron (models based on sockets 754 and AM2), Opteron and Turion 64 CPUs based on this architecture. Read our Inside AMD64 Architecture for an in-depth explanation on how these CPUs work.
Because of this architecture the communication between the CPU and the memory modules is done through a dedicated memory bus, while the communication between the CPU and the chipset uses a separated bus, HyperTransport (click here to read our tutorial on HyperTransport).
AMD CPUs based on Athlon 64 architecture can be found with the following socket types:
- Socket 754: Used by early Athlon 64, some Sempron and Turion 64 models. Their memory controller is single channel, meaning that the CPU accesses memory at 64-bit rate.
- Socket 939: Used by Athlon 64, Athlon 64 FX, Athlon 64 X2 and Opteron processors. Their memory controller is dual channel, meaning that the CPU accesses memory at 128-bit rate, if an even number of memory modules is used.
- Socket 940: Used by early Athlon 64 FX and Opteron processors. Their memory controller is dual channel, meaning that the CPU accesses memory at 128-bit rate, if an even number of memory modules is used. They require ECC memory type.
- Socket AM2: Used by Athlon 64, Athlon 64 FX, Athlon 64 X2 and Sempron (some models) processors. On these models the embedded memory controller supports DDR2-533, DDR2-667 and DDR2-800 memories at dual channel configuration, meaning that the CPU accesses the memory at 128-bit rate if an even number of memory modules is used. Keep in mind that the memory controller found on socket 754, 939 and 940 CPUs supports only DDR memories.
- Socket AM2+: Used by some Athlon X2 models based on Phenom processor, introduced two new features, HyperTransport 3.0 bus (higher bandwidth between the CPU and the chipset) and separated power pins for the processing cores and the memory controller, which allows the memory controller to work at a higher clock rate and solving the clock multiplier problem explained below. AM2+ processors can be installed on AM2 motherboards, but HyperTransport bandwidth will be limited to 4 GB/s, the memory controller will work at a lower clock rate and the problem of the memory being accessed at a slower clock rate (see below) can happen. Socket AM2+ CPUs supports DDR2 memory up to 1,066 MHz.
- Socket AM3: Used by Athlon II X2, Athlon II X3 and Athlon II X4 CPUs. This socket also uses HyperTransport 3.0 bus and the main difference between socket AM3 and AM2+ is the support for DDR3 memory modules. An AM3 CPU can be installed on AM3 motherboards (working only with DDR3 memory modules) or on AM2+ motherboards (supporting, then, DDR2 memory). AM3 motherboards, however, support only AM3 processors.
- Socket F: This 1,207-pin socket created for Opteron models is also used by Athlon 64 FX processors used on AMD’s Quad FX platform (Athlon 64 FX models 7x). CPUs based on this socket can operate under SMP (Symmetric Multiprocessing) mode, i.e., you can have more than one CPU working in parallel. Like socket AM2 and AM2+ processors, the memory controller found on socket F processors supports DDR2-533, DDR2-667 and DDR2-800 memories under dual channel configuration, meaning that the CPU can access the memory at a 128-bit rate if an even number of memory modules is used.
The memory controller integrated on socket AM2 and socket F CPUs can support DDR2-533, DDR2-667 and DDR2-800 memories. The problem, however, is how the memory bus clock is achieved. Instead of being generated through the CPU base clock (HTT clock, which is of 200 MHz), it divides the CPU internal clock. The value of this divider is half the value of the CPU multiplier.
For example, an AMD64 CPU with a clock multiplier of 12x will have a memory bus divider of 6. So this CPU will work at 2.4 GHz (200 MHz x 12) and its memories will work at 400 MHz (DDR2-800, 2,400 MHz / 6). Keep in mind that DDR and DDR2 memories are rated with double their real clock rate.
The problem is when the CPU clock multiplier is an odd number. For an AM2 CPU with a clock multiplier of 13x, theoretically its memory bus divider would be of 6.5. Since the AMD64 memory bus doesn’t work with “broken” dividers, it is rounded up to the next higher number, seven in this case. So while this CPU will work at 2.6 GHz (200 MHz x 13), its memory bus will work at 371 MHz (742 MHz DDR) and not at 400 MHz (800 MHz DDR), making the CPU to not achieve the maximum bandwidth the DDR2 memory can provide.
Here are some examples:
CPU Internal Clock
This problem does not occur on socket AM2+ and AM3 CPUs.
Other features found on processors based on AMD64 architecture are:
- The processors are not sold by their clock rate but by a “performance rating” (PR) figure.
- Addressing up to 1 TB (terabyte) of RAM memory (address bus with 40 addressing lines, 2^40 = 1 TB).
- Support for MMX, 3Dnow!, SSE and SSE2 instructions (SSE3 only on the latest models, SSE4a only on AM2+ and AM3 models).
- EVP (Enhanced Virus Protection) Technology, also known as “NX Bit Diable,” read our tutorial on this subject.
- Cool’n’Quiet Technology, click here to learn more about it.
Now let’s see all Athlon 64, Athlon 64 FX, Athlon 64 X2, Athlon II X2, Athlon II X3 and Athlon II X4 models released to date.
| Page 1 of 7 | Next » |
|Print Version | Send to Friend | Bookmark Article
| Comments (3)
October 1, 2013 - 7:23 AM PST
September 30, 2013 - 7:23 AM PST
September 30, 2013 - 7:22 AM PST
September 27, 2013 - 5:33 AM PST
September 27, 2013 - 5:32 AM PST
September 27, 2013 - 5:30 AM PST
September 26, 2013 - 6:30 AM PST
September 26, 2013 - 6:21 AM PST
September 26, 2013 - 6:15 AM PST
September 25, 2013 - 5:27 AM PST
Our Most Popular Articles
Latest Threads in Our Forums
by Gabriel Torres
by Hardware Secrets Team
by Gabriel Torres