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Recommended Book
The Unabridged Pentium 4: IA32 Processor Genealogy (PC System Architecture Series)
By Tom Shanley
Addison-Wesley Professional
Price: $34.40

Home » CPU
Inside Pentium 4 Architecture
Author: Gabriel Torres
Type: Tutorials Last Updated: October 18, 2005
Page: 6 of 7
$ Check REAL-TIME pricing for Intel Pentium® 4 650, 3.4 GHz (BX80547PG3400F) Boxed Processor $
Gstechco: $108.58

Scheduler

The scheduler has four units. It analyses each microinstruction and puts it on a scheduler unit according to its type:

  • Memory scheduler unit: for memory-related microinstructions. These are the microinstructions that came from the memory microinstruction queue.
  • Fast scheduler unit: this unit is for simple microinstructions.
  • Slow / General FP scheduler unit: this unit is for other microinstructions and for complex floating point microinstructions.
  • Simple FP scheduler unit: this unit is for simple floating point microinstructions.

So, the scheduler sorts the microinstructions according to their type. Then the scheduler can dispatch each microinstruction directly to the correct execution unit to be processed.

The scheduler is the heart of the out-of-order engine on Pentium 4. Until now all microinstructions were delivered on the same order they were decoded. On the scheduler the microinstructions can be dispatched on a totally different order to the execution engines. The goal of the scheduler it to keep all CPU execution engines busy all the time.

The execution units are connected to the scheduler thru four dispatch ports, numbered 0 thru 3, as you can see on Figure 5.

Pentium 4 Architecture
click to enlarge
Figure 5: Scheduler units.

Pages (7): « 1 2 3 4 5 [6] 7 »
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