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PCI Express System Architecture
PCI Express System Architecture, by Tom Shanley (Addison-Wesley Professional), starting at $39.99
Home » Motherboard » Bus
PCI Express Bus Tutorial
Author: Cássio Lima
Type: Tutorials Last Updated: September 6, 2005
Page: 3 of 4
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Operation Modes

The PCI Express bus has been developed to substitute PCI and AGP buses. It’s compatible in terms of software to the PCI bus, which means old drivers and operating systems don’t need to go through changes in order to support the PCI Express bus.

The PCI Express bus is a serial bus that works in full-duplex mode. Data is transmitted in this bus through two pairs of wires called lane, by using the codification system 8b/10b, the same system used in Fast Ethernet (100BaseT, 100 Mbps) networks. Each lane allows a maximum transfer rate of 250 MB/s in each direction, almost twice the rate of the PCI bus. The PCI Express bus can be built by combining several lanes in order to achieve higher performance. We can find PCI Express systems with 1, 2, 4, 8, 16 and 32 lanes. For example, the transfer rate of a PCI Express system with 8 lanes (x8) is 2 GB/s (250 * 8). 

PCI Express Tutorial
click to enlarge
Figure 3: PCI Express x2 bus.

On the chart below we compared the transfer rates of the PCI, AGP and PCI Express busses.

Bus

Maximum Transfer Rate

PCI

133 MB/s

AGP 2x

533 MB/s

AGP 4x

1,066 MB/s

AGP 8x

2,133 MB/s

PCI Express x1

250 MB/s

PCI Express x2

500 MB/s

PCI Express x4

1,000 MB/s

PCI Express x16

4,000 MB/s

PCI Express x32

8,000 MB/s

The PCI Express bus is hot plug, i.e., it’s possible to install and remove PCI Express boards even when the PC is on.

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